Field of the Invention
The present invention relates to a clock generator with an injection-locked phase-locked loop (ILPLL).
Description of the Related Art
There is an increasing demand for modern integrated circuit designs to have a high frequency and a low-jitter clock. Thus, phase-locked loops (PLLs) that have jitter on the order of a few picoseconds have become the preferred choice. To get better phase noise, a wider loop bandwidth is needed to suppress the noise from the voltage-controlled oscillators (VCOs) of the PLLs. In order to achieve a wider loop PLL bandwidth, an injection-locked technique can be introduced in the VCO design of the PLL, to establish an injection-locked phased-locked loop (ILPLL).
ILPLLs are widely used in clock generators. An ILPLL control technique for the generation of a low-jitter clock signal is called for.